MITRE’s Pix2Net™ v2.0 software suite offers a groundbreaking solution to reverse engineering of complex integrated circuits (ICs). Coupled with a user’s scanning electron microscope (SEM), this software enables capture and stitching of images, using proprietary software to form a continuous mosaic layer, allowing for extraction of functionality and microcode.
MITRE Pix2Net
Pix2Net™ aims to streamline the difficulty associated with reverse engineering (RE) state-of-the-art complex microcircuitry. The market for integrated circuits continues to move toward smaller and more-complex designs that involve billions of nodes of information to track. Pix2Net solves this, and other fundamental issues of reverse engineering, by transposing images from physical features to an electrical functional model, using a highly automated and efficient software suite.
Additionally, Pix2Net offers GDSII conversion, polygon editing, and cloning features, enabling seamless transitions to existing programs.
Value Proposition
The Pix2Net software suite will enable a user to streamline the reverse engineering process and convert physical chip design into a digital model. This digital model provides the user with the ability to extract circuit functionality and microcode and identify potential vulnerabilities. The reverse engineering process is essential for the military to maintain aging equipment from the 1980s and 1990s.
Pix2Net Automated RE Software Features
- Automated SEM and focused ion beam (FIB) delayer and image capture (focus control)
- Imaging interconnects and vias
- Diffusion/implants (transistors)
- Stitch tiles (mosaic)/overlay and align layers
- Convert to GDSII (ICs or Gerber printed circuit boards [PCBs])
- Extract library of cell catalog
- Automated schematic, truth table, Verilog or VHDL, cell name
- Auto search and place library cell instances
- Netlist – schematic generation
- Automated error correction routines (short finder, output shorted, etc.)
- Hierarchal block generation and autofind
- Microcode memory extraction
- Export GDSII, library catalog, EDIF to common CAD tools
- Import images, GDSII, library cells
MITRE Pix2Net v2.0 features a revolutionary new tool that automates sample delayering, reducing the need for manual preparation and allowing users to access imaging of transistor sizes up to the cutting edge of industry. Referred to as the Auto Delayer Module, this capability features a highly automated plasma FIB IC delayering with error detection to allow for the fastest possible delayering and imaging throughput, at a quality level that allows for functional extraction of the microcircuit.
Applications
Reverse Engineering
Microcode Extraction
IC Laser Probing
Anti-Tamper Design
Security Evaluation
Obsolescence Management
Patent Protection
Trusted Designs
Reverse Engineering
Complete, turn-key reverse engineering services for PCBs and ICs to support design recovery, failure analysis, design evaluation, anti-tamper assessment, microcode extraction, and intellectual property (IP) protection.
Microcode Extraction
Proven techniques enable on-device implanted ROM extraction, using EBIC techniques and pattern recognition algorithms.
IC Laser Probing
Leveraging newly developed THz pulsed laser hardware to detect blacktopped counterfeit ICs, as well as enabling device probing for active ICs, when subjected to various conditions and threats.
Anti-Tamper Design
Anti-tamper and camouflage IP to protect Critical Technology elements at all levels, from intelligent design and disaggregation at the die level to coating and protection strategies at the chip and board level.
Security Evaluation
Leverage MITRE’s expertise in design, review, or analysis. Our reverse engineering experts can provide valuable insights for Red Team reviews, vulnerability assessments, or even device penetration testing and evaluation.
Obsolescence Management
Re-create the entire design of an IC that has become obsolete. Re-create the GDS II level, complete schematic, and functional model extraction.
Patent Protection
Analysis for IC design houses and law firms that specialize in IP representation. Services include complete physical and electrical extraction of circuit layouts and functionality, to provide evidence for relevant patent claims.
Trusted Designs
May be used to conduct a comprehensive Golden GDSII to extracted GDSII that enables detection of rogue circuits, counterfeit ICs, and supports detailed failure analysis activities.
Reverse Engineering
Complete, turn-key reverse engineering services for PCBs and ICs to support design recovery, failure analysis, design evaluation, anti-tamper assessment, microcode extraction, and intellectual property (IP) protection.
Microcode Extraction
Proven techniques enable on-device implanted ROM extraction, using EBIC techniques and pattern recognition algorithms.
IC Laser Probing
Leveraging newly developed THz pulsed laser hardware to detect blacktopped counterfeit ICs, as well as enabling device probing for active ICs, when subjected to various conditions and threats.
Anti-Tamper Design
Anti-tamper and camouflage IP to protect Critical Technology elements at all levels, from intelligent design and disaggregation at the die level to coating and protection strategies at the chip and board level.
Security Evaluation
Leverage MITRE’s expertise in design, review, or analysis. Our reverse engineering experts can provide valuable insights for Red Team reviews, vulnerability assessments, or even device penetration testing and evaluation.
Obsolescence Management
Re-create the entire design of an IC that has become obsolete. Re-create the GDS II level, complete schematic, and functional model extraction.
Patent Protection
Analysis for IC design houses and law firms that specialize in IP representation. Services include complete physical and electrical extraction of circuit layouts and functionality, to provide evidence for relevant patent claims.
Trusted Designs
May be used to conduct a comprehensive Golden GDSII to extracted GDSII that enables detection of rogue circuits, counterfeit ICs, and supports detailed failure analysis activities.
MITRE’s Pix2Net software suite effortlessly performs
tear-downs on state-of-the-art microcircuits, including:
| Chip | Size |
|---|---|
| NVIDIA GM107-400-A2 | 28nm |
| iPhone | 20nm |
| Lenovo Yoga 3 Pro | 14nm |
| Galaxy Note 4 | 28nm |
| Galaxy Note 4 Int | 20nm |
| Intel NUC NUC5i3RYK | 14nm |
| Samsung Galaxy S6 | 14nm |
| Sony Xperia E4G | 28nm |
| GoPro Camera – 32 nm Samsung | 32nm |
| Intel Atom X5-Z8500 14 nm FinFET | 14nm |
| H9HKNNNCTUMV BRNMH 603A | 14nm |
| Lenovo Idea Pad 310-15IKB | 14nm |
| Think Server/i5 E3-1220v5 | 14nm |
| AMD Polaris 11 GPUs | 14nm |
| AMD YD170XBCAEWOF Ryzen 7 | 14nm |
| Intel QX9650 | 45nm |
| A10X (NORG63Z1L1/NORH76Z5L1) | 10nm |
| MSM 8998 | 10nm |
| Sony Experian XA - NS2806B | 28nm |
| Intel i3 Processor | 10nm |
Additional Information
Inventors
- Michael Strizich
- Eric Henson
Technology Readiness Level
- TRL 7-9